1. Field of the Invention
This invention relates to a solid state imaging device, and more particularly to a solid state imaging device having a photodetecting portion of amorphous silicon.
2. Description of the Prior Art
Conventional solid state imaging devices generally comprise a photodetecting portion such as formed of photodiodes arranged in a matrix form, and scanning circuits for selecting signals detected by the photodetecting portion. For example, Japanese Patent Publication No. 45(1970)-30768 discloses a solid state imaging device which comprises a photodetecting portion in a matrix form combined with a field effect transistor circuit for X-Y scanning. (Hereinafter this type will be referred to as X-Y matrix type.) There also have been known such solid state imaging devices including a photodetecting portion in a matrix form combined with another scanning circuit such as a Bucket Brigade Device (BBD), a Charge Coupled Device (CCD) or a Charge Priming Transfer (CPT) type charge transfer portion. See Japanese Unexamined Patent Publication Nos. 46(1971)-1221 and 47(1972)-26091, and "Electronics Material" P. 6 et seq., March 1980.
However, these conventional solid state imaging devices are disadvantageous in that the light utilization efficiency per unit area is very low since the photodetecting portion and the circuit for consecutively selecting signals detected by the photodetecting portion (including said X-Y matrix circuit, said charge transfer circuit and a field effect transistor functioning as a switching element for delivering an electric charge to the circuits) are two dimensionally arranged in a common plane.
Recently, there has been developed a solid state imaging device employing a photoconductive layer as the photodetecting portion, in which the photoconductive layer is disposed on said scanning circuit to form a multilayer structure, thereby increasing the light utilization efficiency thereof. For example, Japanese Unexamined Patent Publication No. 49(1974)-91116 discloses a solid state imaging device comprising a photoconductive layer disposed on an X-Y matrix type scanning circuit using field effect transistors. Further, in Japanese Unexamined Patent Publication No. 55(1980)-27772, there is disclosed a solid state imaging device comprising a BBD type or CCD type scanning circuit and a polycrystal evaporation layer disposed thereon of II-VI group compound semiconductor having heterojunction.
On the other hand, positive attempts have been made to utilize amorphous silicon as a semiconductor for a solar battery or electrophotographic photosensitive material. The amorphous silicon differs from crystal silicon in that the former has no periodicity in its atomic arrangement while the latter has a long periodic system in its atomic arrangement. Thus, the conventional amorphous silicon exhibits very inferior photo-electric characteristics because of the structure defect due to its aperiodicity. However, it has been found that amorphous silicon including hydrogen and/or fluorine serving to lower the gap state of electrons and positive holes within the energy gap of the amorphous silicon exhibits high photoconductivity with relatively high resistivity (10.sup.8-9 .OMEGA.cm). Furthermore, it has been found that the conductivity of such amorphous silicon can be controlled by doping impurity like the crystal silicon. See for example W. E. Spear and P. G. Le Comber, "Solid State Communication" vol. 17, 1975, P. 1193 et seq. Thus, the impurity doped amorphous silicon is highly attentioned in the fundamental field and the applied field with the primary application thereof directed to a photovoltaic element, as described in D. E. Carlson and C. R. Wronski, "Applied Physics Letters" vol. 28, 1976, P. 671 et seq.
There has been made an attempt to use such amorphous silicon as the photoconductive layer in the solid state imaging device of multilayer structure as set forth in Japanese Unexamined Patent Publication No. 55(1980)-39404. The solid state imaging device includes a single layer of amorphous silicon formed so as to be electrically connected to the source electrode or the drain electrode of a field effect transistor of an X-Y matrix type or a charge transfer type scanning circuit associated with MOS type field effect transistors arranged in a matrix form, and a transparent electrode superposed thereon.
However, in accordance with our experiments, it is very difficult to obtain amorphous silicon having both high dark resistivity and high photoconductivity. That is, when the dark resistivity is improved, the photoconductivity is lowered, and vice versa.
For example, when the temperature of a substrate on which a layer of amorphous silicon is to be formed is maintained at a low temperature not higher than 250.degree. C. during glow discharge in silane in order to obtain amorphous silicon having high resistivity as high as 10.sup.12 .OMEGA.cm which is required for the photodetecting layer of a solid state imaging device, the resulting amorphous silicon generally has inferior photoconductive characteristics particularly with low sensitivity especially in a low potential electric field. This is considered to be caused by increased lattice defects in the layer. Further, it has also been known to produce amorphous material having high dark resistivity by adding a small amount of methane to silane when subjecting it to glow discharge, thereby substituting carbon atoms, a homologue of silicon, for some silicon atoms. However, even with this method, the photoconductive characteristics of the material are degraded if the dark resistivity thereof is increased.
On the other hand, when the temperature of said substrate is maintained at a relatively high temperature equal to or higher than 250.degree. C. in order to improve the photoconductive characteristics, the resulting amorphous silicon would exhibit low resistivity (10.sup.8-9 .OMEGA.cm) and the solid state imaging device using same would exhibit an inferior S/N ratio with dark current. Therefore, in general, in making a silicon layer, the high dark resistivity and the high photoconductivity conflict with each other, and accordingly, it is very difficult to obtain a silicon layer having both of these desirable properties.